(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of defining an anti-fuse cell window in the fabrication of integrated circuits.
(2) Description of the Prior Art
In the fabrication of anti-fuse cells for programmable gate arrays, the current process uses a thin silicon nitride film as a mask in defining the anti-fuse cell window. Because of poor center to edge etching uniformity, silicon nitride residues are often left. FIG. 1 illustrates a partially completed integrated circuit device. On a semiconductor substrate, a layer of silicon nitride 15 has been deposited over a layer of silicon oxide 14. In the cell area A, a window 19 is etched, using the silicon nitride layer 15 as a mask. The window is then filled with an insulating layer 26 and polysilicon layer 28. However, in the active area B, because of the poor etching uniformity, silicon nitride residues 17 are left.
U.S. Pat. No. 4,796,074 to Roesner and U.S. Pat. No. 5,322,812 to Dixit et al show anti-fuse methods and resulting structures.